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Скачати безплатно Xilinx ISE Design Suite v13.3 Multiplatform
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Xilinx ISE Design Suite v13.3 Multiplatform
Xilinx ISE Design Suite v13.3 Multiplatform
Xilinx ISE Design Suite v13.3 MULTIPLATFORM | 8.03 GB
Xilinx introduced the ISE Design Suite software to enable breakthrough optimizations for power and cost with greater design productivity. For the first time, ISE design tools deliver 'intelligent' clock-gating technology that reduces dynamic power consumption by as much as 30 percent. The new suite also provides advances in timing-driven design preservation, AMBA 4 AXI4-complaint IP support for plug-and-play design, and an intuitive design flow with fourth-generation partial reconfiguration capabilities that lowers system cost for a broad range of high performance applications. With full production support for all Xilinx Virtex-6 and Spartan-6 FPGA families, the ISE release continues its evolution as the industry's only domain-specific design suite with interoperable design flows and tool configurations for logic, digital signal processing (DSP), embedded processing, and system-level design. In addition, Xilinx incorporated a number of software infrastructure and methodology enhancements that improve run time, streamline system integration, and expand IP interoperability across its latest generation device families and Targeted Design Platforms.
Nov 04, 2011 (Close-Up Media via COMTEX) -- Xilinx announced the availability of ISE Design Suite 13.3, featuring new capabilities for DSP designers to implement bit-accurate single, double and full custom precision floating-point math operations in their designs targeting wireless, medical, aerospace and defense, high-performance computing and video applications.
According to Xilinx, this flow is available through System Generator for DSP and leverages the Xilinx Floating-Point Operator IP LogiCORE. The combination of single, double and the industry's only full custom precision floating-point with the productivity of System Generator for DSP, provides DSP designers an environment to create, simulate and implement floating-point designs, as well as have more control over the silicon area and power required by their systems.
"Compared to competing solutions, only System Generator for DSP provides developers with a bit accurate solution, meaning we can guarantee that the simulation model will match the hardware implementation," said Tom Feist, Sr. Marketing Director, Design Methodology Marketing at Xilinx. "Xilinx 7 series 28nm FPGAs can deliver up to 1.33 teraflops of single-precision floating-point performance on one device, which is driving the demand for an easy-to-use design flow that delivers hand crafted results." The Xilinx Floating-Point Operator core allows a range of floating-point arithmetic operations that can be performed in an FPGA. The operation is specified when the core is generated through the CORE Generator tool and now System Generator, and each operation variant has a common AXI-4 streaming interface. Previously, it was possible to implement a floating-point design in a Xilinx FPGA leveraging the full custom precision floating-point IP available in CORE Generator. However, the design flow required an understanding of VHDL or Verilog and simulation could be challenging for DSP developers. With the availability of ISE Design Suite 13.3, designers can now realize their systems from a higher level of abstraction and by leveraging the simulation capabilities in The MathWorks' Simulink tool enable the confidence that their design meets their fidelity requirements.
ISE Design Suite 13.3 also adds Red Hat Enterprise Linux 6 and provides productivity enhancements for Logic, Embedded and System Edition users. All editions contain enhancements to Plug-and-Play IP and device support for 7 series devices. Embedded and System Editions contain significant Platform Studio ease-of-use enhancements including a new Graphical Design View. Logic Edition contains productivity enhancement to the PlanAhead design analysis tool, including a graphical hierarchy viewer for HDL files.
ISE Design Suite 13 is immediately available for all ISE Editions.
Microsoft Windows XP Professional (32 and 64 bit) Microsoft Windows Vista Business (32 and 64 bit) Windows 7 Red Hat Enterprise Linux 4 WS-32bit Red Hat Enterprise Linux 4 WS-64bit Red Hat Enterprise Linux 5 WS-32bit Red Hat Enterprise Linux 5 WS-64bit Suse Linux Enterprise 11 32-bit Suse Linux Enterprise 11 64-bit
ISE WebPACK (Free) ISE Design Suite (All Editions) ChipScope Pro and ChipScope Pro Serial IO Toolkit PlanAhead Design and Analysis System Generator for DSP Platform Studio and Embedded Development Kit (EDK) Software Development Kit (SDK) Lab Tools: Standalone Installation
